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Method for manufacturing dummy gate in gate-last process and dummy gate in gate-last process

机译:后栅极工艺中的伪栅极的制造方法和后栅极工艺中的伪栅极

摘要

A method for manufacturing a dummy gate in a gate-last process is provided. The method includes: providing a semiconductor substrate; growing a gate oxide layer on the semiconductor substrate; depositing bottom-layer amorphous silicon on the gate oxide layer; depositing an ONO structured hard mask on the bottom-layer amorphous silicon; depositing top-layer amorphous silicon on the ONO structured hard mask; depositing a hard mask layer on the top-layer amorphous silicon; forming photoresist lines having a width ranging from 32 nm to 45 nm on the hard mask layer; and etching the hard mask layer, the top-layer amorphous silicon, the ONO structured hard mask and the bottom-layer amorphous silicon in accordance with the photoresist lines, and removing the photoresist lines, the hard mask layer and the top-layer α-Si. Correspondingly, a dummy gate in a gate-last process is also provided.
机译:提供了一种在后栅极工艺中制造伪栅极的方法。该方法包括:提供半导体衬底;以及在半导体衬底上生长栅氧化物层;在栅极氧化物层上沉积底层非晶硅;在底层非晶硅上沉积ONO结构的硬掩模;在ONO结构的硬掩模上沉积顶层非晶硅;在顶层非晶硅上沉积硬掩模层;在硬掩模层上形成宽度为32nm至45nm的光刻胶线;根据光刻胶线刻蚀硬掩模层,顶层非晶硅,ONO结构的硬掩模和底层非晶硅,并去除光刻胶线,硬掩模层和顶层α-硅。相应地,还提供了后栅极工艺中的伪栅极。

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