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IMPROVED SRAM STORAGE UNIT BASED ON DICE STRUCTURE

机译:基于骰子结构的改进的SRAM存储单元

摘要

An improved SRAM storage unit based on a DICE structure. The unit comprises the following structures: four phase inverter structures and a transmission structure. Each phase inverter structure consists of a PMOS transistor and an NMOS transistor connected in series. A storage node is formed between a drain of each PMOS transistor and a drain of each NMOS transistor. Each storage node controls a gate voltage of an NMOS transistor of another phase inverter structure and a gate voltage of a PMOS transistor of still another phase inverter structure. The transmission structure consists of four NMOS transistors. Sources, gates and drains of the four NMOS transistors are separately connected to a bit line/inverse phase bit line, a word line, and a storage node. By using the improved SRAM storage unit based on a DICE structure, the defects that the static noise margin of a traditional six-transistor unit structure is small and the transmission is error-prone are avoided, the problem that an existing SRAM storage unit based on a DICE structure is easily influenced by an electrical level of the storage node is solved and the reliability of the storage unit is improved.
机译:一种基于DICE结构的改进型SRAM存储单元。该单元包括以下结构:四相逆变器结构和传输结构。每个相逆变器结构由串联连接的PMOS晶体管和NMOS晶体管组成。在每个PMOS晶体管的漏极和每个NMOS晶体管的漏极之间形成存储节点。每个存储节点控制另一反相器结构的NMOS晶体管的栅极电压和另一反相器结构的PMOS晶体管的栅极电压。传输结构由四个NMOS晶体管组成。四个NMOS晶体管的源极,栅极和漏极分别连接到位线/反相位线,字线和存储节点。通过使用基于DICE结构的改进型SRAM存储单元,避免了传统的六晶体管单元结构的静态噪声容限小,传输容易出错的缺陷,从而避免了现有的基于SRAM的存储单元的缺点。解决了DICE结构容易受到存储节点的电电平影响的问题,并提高了存储单元的可靠性。

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