Y U V Reusable DCT Architecture for Parallel Processing of Y U and V Transforms in HEVC

摘要

The present invention relates to a reusable DCT architecture for parallel processing of Y, U and V transformation in HEVC. The DCT architecture performs processing of residual blocks of Y, U, and V for a transform unit (TU) which is composed of luma component Y, chrominance component U, and V of HEVC using a transpose memory. The transpose memory stores the first-dimensionally transformed residual blocks of Y, U, and V of a 161 TU as a first color and stores the residual blocks of Y, U, and V of a 88 TU as a second color. The present invention enables efficient use of the transpose memory which is not in use to calculate the U and V residual transform in parallel with Y residual transform and can reduce a significant number of cycles as the U and V residual transform is performed during the time required to calculate the Y transform.