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Y U V Reusable DCT Architecture for Parallel Processing of Y U and V Transforms in HEVC
Y U V Reusable DCT Architecture for Parallel Processing of Y U and V Transforms in HEVC
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机译:用于HEVC中的Y U和V变换的并行处理的Y U V可重用DCT架构
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摘要
The present invention relates to a reuse decomposition architecture for parallel processing of Y, U, and V transforms in HVC, and includes YU, U for a TU (Transform Unit) consisting of luma component Y, chrominance component U and V of HEVC V residual blocks in a transpose memory, wherein the transpose memory is configured to remove 1D transformed Y, U, and V residuals for a TU of size 16x1. 1 color, and the Y, U, and V residuals of 8 x 8 TU are stored as the second color. The present invention can efficiently use a transpose memory that is not used for calculating the U and V residual transforms in parallel with the Y residual transform, A significant number of cycles are saved because the U and V residual transforms are performed during the time required to calculate the Y transform.
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机译:本发明涉及用于HVC中的Y,U和V变换的并行处理的重用分解架构,并且包括用于TU(变换单元)的YU,U,TU(变换单元)包括亮度分量Y,色度分量U和HEVC V残差的V转置存储器中的多个块,其中转置存储器被配置为针对尺寸为16x1的TU移除1D变换的Y,U和V残差。 1种颜色,并将8 x 8 TU的Y,U和V残差存储为第二种颜色。本发明可以有效地使用不用于与Y残差变换并行地计算U和V残差变换的转置存储器。由于在需要时间的时间内执行了U和V残差变换,因此节省了大量的周期。计算Y变换。
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