3D STACKED MEMORY ARRAY AND METHOD FOR DETERMINING THRESHOLD VOLTAGES OF STRING SELECTION TRANSISTORS

摘要

The present invention provides a 3D stacked memory array capable of selecting layers regardless of the number of layers or as many layers as possible even with the limited numbers of threshold voltage states and SSLs, and a method for determining threshold voltages of string selection transistors by an LSMP method. Accordingly, the degree of integrity of a memory can be maximized by minimizing the number of SSLs, and there is no limitation in the layer selection by considering a current aspect ratio of a semiconductor etching process.;COPYRIGHT KIPO 2016