The method involves performing synchronization and phasing steps permitting to implement control voltage vector at frequency and a turning voltage vector defined by exact connection between three input phases (u, v, w) and three output phases (a, b, c) of a speed variator. The control voltage vector is amplified beyond 87 percent of amplitude of input voltages (Vun, Vvn, Vwn) and until reaching amplitude of the turning voltage vector, where the input phases are connected to an alternative voltage source applying the input voltages between the input phases and the output phases. An independent claim is also included for a direct matrix converter type speed variator comprising a control unit for amplifying a control voltage vector.
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