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Post-layout thermal-aware integrated circuit performance modeling

机译:布局后的热感知集成电路性能建模

摘要

Disclosed are integrated circuit (IC) design methods, systems and computer program products. During IC design, an electrical netlist with built-in electrical resistance elements (i.e., electrical resistors) is extracted based on an IC design layout. A thermal netlist with built-in thermal resistance elements (i.e., thermal resistors) is automatically extracted based on the electrical netlist. This thermal netlist identifies thermal resistors, external thermal nodes and internal thermal node(s) and does so such that there is one-to-one mapping of the thermal resistors to electrical resistors in the electrical netlist, one-to-one mapping of the external thermal nodes to input, output and power supply nodes in the electrical netlist and one-to-one mapping of the internal thermal node(s) to element(s) (e.g., library and/or customized elements) in the electrical netlist. The electrical and thermal netlists are combined and simulations are performed on the combined electrical-thermal netlist in order to generate a thermal-aware performance model of the IC.
机译:公开了集成电路(IC)设计方法,系统和计算机程序产品。在IC设计期间,将根据IC设计布局提取具有内置电阻元件(即电阻器)的电气网表。具有内置热阻元件(即热敏电阻)的热网表会根据电子网表自动提取。该热网表标识热敏电阻,外部热节点和内部热节点,并且这样做是为了使热电阻与电网表中的电阻之间存在一对一的映射,而热网则是一对一的映射。外部热节点到电子网表中的输入,输出和电源节点,以及内部热节点到电子网表中的元素(例如,库和/或定制元素)的一对一映射。将电和热网表进行组合,并对组合的电热网表进行仿真,以生成IC的热感知性能模型。

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