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Non-volatile semiconductor memory device and memory system in which write operation is resumed after being suspended for an interrupt operation

机译:非易失性半导体存储装置和存储系统,其中在中断操作被暂停之后恢复写操作

摘要

A non-volatile semiconductor memory device includes a memory cell array and a control circuit. A control circuit performs an erase operation providing a memory cell with a first threshold voltage level for erasing data of a memory cell, and then perform a plurality of first write operations providing a memory cell with a second threshold voltage level, the second threshold voltage level being higher than the first threshold voltage level and being positive level. When the control circuit receives a first execution instruction from outside during the first write operations, the first execution instruction being for performing first function operation except for the erase operation and the first write operations, the circuit performs the first function operation during the first write operations.
机译:非易失性半导体存储装置包括存储单元阵列和控制电路。控制电路执行擦除操作,为存储单元提供用于擦除存储单元的数据的第一阈值电压电平,然后执行多个第一写入操作,为存储单元提供第二阈值电压电平,第二阈值电压电平高于第一阈值电压电平并为正电平。当控制电路在第一写操作期间从外部接收到第一执行指令时,该第一执行指令用于执行除擦除操作和第一写操作之外的第一功能操作,电路在第一写操作期间执行第一功能操作。

著录项

  • 公开/公告号US9583200B2

    专利类型

  • 公开/公告日2017-02-28

    原文格式PDF

  • 申请/专利权人 KABUSHIKI KAISHA TOSHIBA;

    申请/专利号US201615074190

  • 发明设计人 YASUSHI NAGADOMI;

    申请日2016-03-18

  • 分类号G11C16/04;G11C16/14;G11C11/56;G11C16/06;G11C16/10;

  • 国家 US

  • 入库时间 2022-08-21 13:42:17

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