首页> 外国专利> Non-volatile semiconductor memory device and reading method for non-volatile semiconductor memory device that includes charging of data latch input node prior to latching of sensed data

Non-volatile semiconductor memory device and reading method for non-volatile semiconductor memory device that includes charging of data latch input node prior to latching of sensed data

机译:非易失性半导体存储器件和用于非易失性半导体存储器件的读取方法,包括在锁存感测到的数据之前对数据锁存输入节点进行充电

摘要

A non-volatile semiconductor memory device includes a memory cell, and a sense amplifier that includes a latch unit, a first transistor having a first end electrically connected to the latch unit and a second end electrically connected to a first node, a second transistor having a first end electrically connected to the first node and a second end electrically connected to the memory cell, and a third transistor having a first end electrically connected to a second node between the first end of the first transistor and the latch unit. A control unit of the device controls the sense amplifier during a read operation, to charge the second node to a first voltage, and then charge the first node to a second voltage, turn on the second transistor after charging the first node to the second voltage, and turn on the third transistor after turning on the second transistor.
机译:一种非易失性半导体存储装置,包括:存储单元;以及读出放大器,其包括锁存器单元;第一晶体管,其第一端电连接至所述锁存器单元;第二端,电连接至第一节点,第二晶体管具有第一端电连接到第一节点,第二端电连接到存储单元,第三晶体管的第一端电连接到在第一晶体管的第一端和锁存单元之间的第二节点。装置的控制单元在读取操作期间控制感测放大器,以将第二节点充电至第一电压,然后将第一节点充电至第二电压,在将第一节点充电至第二电压之后接通第二晶体管。 ,然后在导通第二晶体管之后导通第三晶体管。

著录项

  • 公开/公告号US9543029B2

    专利类型

  • 公开/公告日2017-01-10

    原文格式PDF

  • 申请/专利权人 KABUSHIKI KAISHA TOSHIBA;

    申请/专利号US201514820289

  • 发明设计人 TAKUYO KODAMA;

    申请日2015-08-06

  • 分类号G11C16/04;G11C16/06;G11C16/26;G11C16/32;

  • 国家 US

  • 入库时间 2022-08-21 13:41:09

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