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A method of forming an electrical contact between a carrier wafer and the surface of an upper silicon layer of a silicon-on-insulator wafer and electrical device having such an electrical contact

机译:在载体晶片和绝缘体上硅晶片的上硅层的表面之间形成电接触的方法以及具有这种电接触的电子设备

摘要

A method of forming an electrical contact between a carrier wafer (12) and a surface of an upper silicon layer (16) of a silicon on insulator wafer to set the carrier wafer (12) at a defined potential, the method comprising the steps of Etching a cavity (20) in the top silicon layer (16) and in the insulator layer (14), performing a selective epitaxial step of growing an epitaxial layer of silicon in the cavity (20) to the surface of the top silicon layer (16) in that, by adjusting the width of the cavity (20) with respect to the thickness of the top silicon layer (16), the surface of the silicon epitaxial layer filling the cavity (20) has the same crystal orientation as the surrounding surface of the top silicon layer (16). , wherein subsequently an epitaxial step for growing a further layer (24) made of silicon is performed, where the further silicon layer (24) covering the surface of the silicon epitaxial layer filling the cavity (20) and the surface of the top silicon layer (16), the further silicon layer (24) being grown after removal of an oxide mask ,
机译:一种在载体晶片(12)和绝缘体晶片上的硅的上硅层(16)的表面之间形成电接触以将载体晶片(12)设置为限定电势的方法,该方法包括以下步骤:在顶部硅层(16)和绝缘体层(14)中刻蚀空腔(20),执行选择性外延步骤,将空腔(20)中的硅外延层生长到顶部硅层的表面( (16)在于,通过相对于顶部硅层(16)的厚度调整空腔(20)的宽度,填充空腔(20)的硅外延层的表面具有与周围相同的晶体取向。顶部硅层(16)的表面。 ,其中,随后执行用于生长由硅制成的另一层(24)的外延步骤,其中覆盖覆盖腔(20)的硅外延层的表面和顶部硅层的表面的另一硅层(24) (16),在去除氧化物掩模之后,生长另外的硅层(24),

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