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WRITE LEVELING CONTROL CIRCUIT FOR CONTROLLING WRITE LEVELING OF TARGET MODULE AND WRITE LEVELING CONTROL METHOD USING THE SAME
WRITE LEVELING CONTROL CIRCUIT FOR CONTROLLING WRITE LEVELING OF TARGET MODULE AND WRITE LEVELING CONTROL METHOD USING THE SAME
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机译:用于控制目标模块的写水平的写水平控制电路和使用该方法的写水平控制方法
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摘要
A write leveling control method which includes registering data-related signal (DRS) reference delay values corresponding to types of memory modules in a leveling reference table; transmitting write leveling-related signals to a first type of memory module mounted on a target board; detecting timing skews between a clock signal and data-related signals received from memory devices on the mounted memory module; and adjusting a delay of a data-related signal transmitted to a memory device of the mounted memory module if a corresponding timing skew is outside of a first range, based on the DRS reference delay value corresponding to the mounted memory module.
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