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METHOD FOR ANALYZING AN ELECTROMIGRATION (EM) RULE VIOLATION IN AN INTEGRATED CIRCUIT
METHOD FOR ANALYZING AN ELECTROMIGRATION (EM) RULE VIOLATION IN AN INTEGRATED CIRCUIT
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机译:集成电路中电规则违反行为的分析方法
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摘要
A method includes receiving an input that is in an electronic file format and that includes information associated with an integrated circuit (IC) layout, selecting a non EM rule compliant metal line of the IC layout that is in violation of an EM rule from the input, obtaining a current of the non EM rule compliant metal line from the input, comparing the current with a threshold current, and determining whether the EM rule violation is negligible based on the result of comparison. As such, a semiconductor device may be fabricated from the IC layout when it is determined that the EM rule violation is negligible.
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