首页> 外国专利> Latch based parallel-to-serial readout circuitry and image sensor utilizing the circuitry

Latch based parallel-to-serial readout circuitry and image sensor utilizing the circuitry

机译:基于闩锁的并行至串行读出电路和利用该电路的图像传感器

摘要

A latch-based parallel to serial readout circuitry includes latches connected to each other in series and to data inputs in parallel. The latches read in values from the data inputs in parallel, and then output the values serially. A readout control circuitry of the latch-based parallel to serial readout circuitry may cause the latches to read in the values in parallel by switching an active input connection of the latches to the data inputs and enabling the latches simultaneously. The readout control circuitry may cause the latches to readout the values serially by switching an active input connection of the latches to the output of a next latch and sequentially enabling the latches.
机译:基于锁存器的串行与并行读出电路包括锁存器,这些锁存器彼此串联,并与数据输入并联。锁存器从数据输入端并行读取值,然后串行输出值。通过将锁存器的活动输入连接切换到数据输入并同时启用锁存器,基于锁存器的并行至串行读出电路的读出控制电路可以使锁存器并行读取值。通过将锁存器的有效输入连接切换到下一个锁存器的输出并顺序使能锁存器,读出控制电路可以使锁存器串行读出值。

著录项

  • 公开/公告号US9912896B2

    专利类型

  • 公开/公告日2018-03-06

    原文格式PDF

  • 申请/专利权人 SONY SEMICONDUCTOR SOLUTIONS CORPORATION;

    申请/专利号US201514877141

  • 发明设计人 ZVIKA VEIG;ARIEL BEN SHEM;

    申请日2015-10-07

  • 分类号H04N5/378;H04N5/374;H04N5/369;

  • 国家 US

  • 入库时间 2022-08-21 12:54:30

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