CHIP METHOD AND APPARATUS FOR SECURITY CHIP DESIGN TECHNIQUE

摘要

The present invention includes a plurality of cliques including a plurality of camouflaged gates and a convergence point connecting a primitive path and an additional path. At this time, one or more cliques among the plurality of cliques are included in the primitive path generated by corresponding to a predefined logic and generated by converting one or more gates among a plurality of gates included in a chip into the camouflaged gates. The remaining cliques are generated by converting the plurality of gates added to the chip into the camouflaged gates based on a dummy logic and are included in the additional path corresponding to the dummy logic. Accordingly, the present invention can improve a security level.