A process for manufacturing a semiconductor device of the insulated gate type and a semiconductor device of the insulated gate type

摘要

A method for making a semiconductor device of the insulated gate type, comprising:a semiconductor substrate (12);a front surface electrode (14) which, on a front surface of the semiconductor substrate (12) is provided; anda rear surface electrode (18), the on a rear surface of the semiconductor substrate (12) is made available,the semiconductor device of the insulated gate type is configured between the front surface electrode (14) and the rear surface electrode (18), wherethe semiconductor device of the insulated gate type:a first field (22) of a first conductivity type, the with the front surface electrode (14) is connected;a second field (26) of a second conductivity type, in contact with the first field (22) is;a third field (28) of the first conductivity type, the of the first field (22) by means of the second field (26) is separated;a plurality of gate trenches (34) which, on the front surface of the semiconductor substrate (12) are provided, and said second region (26), penetrate the third field (28) to achieve;Gate insulation layers (34b) and gate electrodes (34c), which in the gate trenches (34) are provided;fourth regions (32) of the second conductivity type, which are provided in regions, which, at lower surfaces of the gate trenches (34) are located on the outside;a plurality of peripheral grooves (54) which, on the front surface of the semiconductor substrate (12) in a region outside of the second region (26) are provided;Insulating layers (53), which in the peripheral grooves (54) are provided; andn="26"fifth regions (56) of the second conductivity type, which are provided in areas at the lower surfaces of the peripheral grooves (54) are located on the outside, the method comprising:Forming the gate trenches (34);Forming the peripheral grooves (54);Forming the fourth regions (32) by implanting of a first type of impurities of the second conductivity type in the lower surfaces of the gate trenches (34) and diffusion of the implanted first type of impurities of the second conductivity type; andForming the fifth regions (56) by implanting a second type of contamination of the second conductivity type in the lower surfaces of the peripheral grooves (54) and diffusion of the implanted second type of impurities of the second conductivity type, whereina diffusion coefficient of the second type of impurities of the second conductivity type in the formation of the fifth regions (56) is greater than a diffusion coefficient of the first type of impurities of the second conductivity type in the formation of the fourth regions (32) is.