The memory includes a memory cell, a bit line coupled to the memory cell, a sense amplifier coupled to the bit line, a timing circuit configured to enable the sense amplifier during a read operation, A control circuit configured to enable the sense amplifier independently of the timing circuit, and a pull-up circuit configured to pull up one bit line while the sense amplifier is enabled by the control circuit And including. The method includes enabling a sense amplifier in a read operation by a timing circuit. The sense amplifier is coupled to at least one bit line, and at least one bit line is coupled to the memory cell. The method further includes enabling the sense amplifier independently of the timing circuit in the second operation, and at least one bit line by the pull-up circuit while the sense amplifier is enabled in the second operation. Pulling up.
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