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A Fully Reconfigurable Low-Noise Biopotential Sensing Amplifier With 1.96 Noise Efficiency Factor

机译:具有1.96噪声效率因子的完全可重构的低噪声生物电势感测放大器

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A fully reconfigurable biopotential sensing amplifier utilizing floating-gate transistors is presented in this paper. By using the complementary differential pairs along with the current reuse technique, the theoretical limit for the noise efficiency factor of the proposed amplifier is below 1.5. Without consuming any extra power, floating-gate transistors are employed to program the low-frequency cutoff corner of the amplifier and to implement the common-mode feedback. A concept proving prototype chip was designed and fabricated in a 0.35 $mu$m CMOS process occupying 0.17 mm$^{2}$ silicon area. With a supply voltage of 2.5 V, the measured midband gain is 40.7 dB and the measured input-referred noise is 2.8 $mu {rm V_{rm rms}}$. The chip was tested under several configurations with the amplifier bandwidth being programmed to 100 Hz, 1 kHz , and 10 kHz. The measured noise efficiency factors in these bandwidth settings are 1.96, 2.01, and 2.25, respectively, which are among the best numbers reported to date. The measured common-mode rejection and the supply rejection are above 70 dB . When the bandwidth is configured to be 10 kHz, the dynamic range measured at 1 kHz is 60 dB with total harmonic distortion less than 0.1%. The proposed amplifier is also demonstrated by recording electromyography (EMG), electrocardiography (ECG), electrooculography (EOG), and electroencephalography (EEG) signals from human bodies.
机译:本文提出了一种利用浮栅晶体管的完全可重构生物电势感测放大器。通过使用互补差分对以及电流重用技术,该放大器的噪声效率因数的理论极限低于1.5。在不消耗任何额外功率的情况下,采用浮栅晶体管对放大器的低频截止角进行编程并实现共模反馈。在0.35微米的CMOS工艺中设计并制造了概念验证原型芯片,该芯片工艺占用了0.17毫米^ {2} $的硅面积。在2.5 V的电源电压下,测得的中频带增益为40.7 dB,测得的输入等效噪声为2.8 $ mu {rm V_ {rm rms}} $。该芯片在几种配置下进行了测试,放大器带宽被编程为100 Hz,1 kHz和10 kHz。在这些带宽设置中测得的噪声效率因子分别为1.96、2.01和2.25,是迄今为止报告的最佳数字之一。测得的共模抑制和电源抑制高于70 dB。当带宽配置为10 kHz时,在1 kHz处测得的动态范围为60 dB,总谐波失真小于0.1%。拟议的放大器还可以通过记录人体的肌电图(EMG),心电图(ECG),眼电图(EOG)和脑电图(EEG)信号进行演示。

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