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Nanowire fabrication method for horizontal gate all-around devices for semiconductor applications

机译:用于半导体应用的水平栅全能器件的纳米线制造方法

摘要

The present disclosure provides a method for forming a nanowire spacer for a nanowire structure with a desired material in a horizontal gate all-around (hGAA) structure of a semiconductor chip. In one example, a method of forming a nanowire space for a nanowire structure on a substrate is to perform a lateral etching process on a substrate having a multi-material layer to be processed thereon, the multi-material layer being Including repeating first and second layer pairs, the first and second layers having first and second sidewalls exposed in the multi-material layer, respectively, in a lateral direction The etching process mainly includes performing a lateral etching process to etch the second layer through the second layer to form a recess in the second layer, filling the recess with a dielectric material, Removing the dielectric layer extending out of the substrate. [Selection] Figure 5F
机译:本公开提供了一种用于在半导体芯片的水平栅极全能(hGAA)结构中用期望的材料形成用于纳米线结构的纳米线间隔物的方法。在一个示例中,一种在基板上形成用于纳米线结构的纳米线空间的方法是在其上具有待处理的多材料层的基板上执行侧向蚀刻工艺,该多材料层包括重复第一和第二步骤。层对,第一和第二层具有分别在横向上暴露在多材料层中的第一和第二侧壁。蚀刻工艺主要包括执行横向蚀刻工艺以穿过第二层蚀刻第二层以形成凹槽。在第二层中,用介电材料填充凹槽,去除延伸出衬底的介电层。 [选择]图5F

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