首页> 外国专利> Schemes for forming barrier layers for copper in interconnect structures

Schemes for forming barrier layers for copper in interconnect structures

机译:在互连结构中形成铜阻挡层的方案

摘要

A method of forming a semiconductor structure includes providing a substrate; forming a low-k dielectric layer over the substrate; embedding a conductive wiring into the low-k dielectric layer; and thermal soaking the conductive wiring in a carbon-containing silane-based chemical to form a barrier layer on the conductive wiring. A lining barrier layer is formed in the opening for embedding the conductive wiring. The lining barrier layer may comprise same materials as the barrier layer, and the lining barrier layer may be recessed before forming the barrier layer and may contain a metal that can be silicided.
机译:一种形成半导体结构的方法,包括:提供衬底;以及形成衬底。在衬底上形成低k介电层;将导电布线嵌入到低k介电层中;将导电布线热浸在含碳的硅烷基化学药品中以在导电布线上形成阻挡层。在开口中形成衬里阻挡层,用于嵌入导电布线。衬里阻挡层可以包括与阻挡层相同的材料,并且衬里阻挡层可以在形成阻挡层之前凹入并且可以包含可以被硅化的金属。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号