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Three dimensional semiconductor memory device in which a channel layer has a stacked structure including an outer semiconductor layer and a doped inner semiconductor layer

机译:其中沟道层具有包括外部半导体层和掺杂的内部半导体层的堆叠结构的三维半导体存储器件

摘要

According to an embodiment, a semiconductor memory device includes a stacked body in which insulating layers and electrode films are alternately stacked, a pillar member arranged in a memory hole that is disposed in the stacked body in a thickness direction, and a semiconductor layer provided below the pillar member. The pillar member has a structure in which a memory film and a channel layer are stacked in order from a side of the stacked body. The channel layer has a stacked structure that includes an outer channel semiconductor layer, an intermediate layer made of an insulating material, and an inner channel semiconductor layer, from a side of the memory film. Both of the outer channel semiconductor layer and the inner channel semiconductor layer are electrically connected to the semiconductor layer.
机译:根据一个实施例,一种半导体存储器件包括:堆叠体,其中绝缘层和电极膜交替地堆叠;柱状构件,布置在沿厚度方向布置在堆叠体中的存储孔中;以及半导体层,其设置在下方支柱成员。柱状部件具有从层叠体的侧面开始依次层叠存储膜和沟道层的结构。沟道层具有堆叠结构,该堆叠结构从存储膜的一侧包括外部沟道半导体层,由绝缘材料制成的中间层和内部沟道半导体层。外沟道半导体层和内沟道半导体层均电连接至半导体层。

著录项

  • 公开/公告号US10283522B2

    专利类型

  • 公开/公告日2019-05-07

    原文格式PDF

  • 申请/专利权人 TOSHIBA MEMORY CORPORATION;

    申请/专利号US201715696372

  • 发明设计人 TOMOFUMI ZUSHI;SHINYA NAITO;

    申请日2017-09-06

  • 分类号H01L27/11582;H01L29/10;H01L29/06;H01L21/28;H01L27/11565;

  • 国家 US

  • 入库时间 2022-08-21 12:11:41

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