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Method for Manufacturing a Si-Based High-Mobility CMOS Device With Stacked Channel Layers, and Resulting Devices

机译:具有堆叠的沟道层的基于Si的高迁移率CMOS器件的制造方法及所得器件

摘要

A device and method for manufacturing a Si-based high-mobility CMOS device is provided. The method includes the steps of: (i) providing a silicon substrate having a first insulation layer on top and a trench into the silicon; (ii) manufacturing a III-V semiconductor channel layer above the first insulation layer by depositing a first dummy layer of a sacrificial material, covering the first dummy layer with a first oxide layer, and replacing the first dummy layer with III-V semiconductor material by etching via holes in the first oxide layer followed by selective area growth; (iii) manufacturing a second insulation layer above the III-V semiconductor channel layer and uncovering the trench; (iv) manufacturing a germanium or silicon-germanium channel layer above the second insulation layer by depositing a second dummy layer of a sacrificial material, covering the second dummy layer with a second oxide layer, and replacing the second dummy layer with germanium or silicon-germanium by etching via holes in the second oxide layer followed by selective area growth.
机译:提供了一种用于制造基于Si的高迁移率CMOS器件的器件和方法。该方法包括以下步骤:(i)提供硅衬底,该硅衬底具有在顶部的第一绝缘层和进入硅的沟槽; (ii)通过沉积牺牲材料的第一虚拟层,用第一氧化物层覆盖第一虚拟层,并用III-V半导体材料代替第一虚拟层,在第一绝缘层上方制造III-V半导体沟道层。通过蚀刻第一氧化物层中的通孔,然后选择性地生长区域; (iii)在III-V半导体沟道层上方制造第二绝缘层并露出沟槽; (iv)通过沉积牺牲材料的第二虚拟层,用第二氧化物层覆盖第二虚拟层,并用锗或硅代替第二虚拟层,在第二绝缘层上方制造锗或硅锗沟道层,通过蚀刻第二氧化物层中的通孔,然后进行选择性的区域生长,形成锗。

著录项

  • 公开/公告号US2019181050A1

    专利类型

  • 公开/公告日2019-06-13

    原文格式PDF

  • 申请/专利权人 IMEC VZW;

    申请/专利号US201916280428

  • 发明设计人 CLEMENT MERCKLING;GUILLAUME BOCCARDI;

    申请日2019-02-20

  • 分类号H01L21/8238;H01L29/786;H01L21/8258;H01L29/423;H01L27/092;H01L29/06;H01L29/66;H01L27/06;H01L21/02;

  • 国家 US

  • 入库时间 2022-08-21 12:11:24

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