CLOCK DRIVING CIRCUIT RESISTANT TO SINGLE-EVENT TRANSIENT

摘要

Disclosed in present invention is a clock driving circuit resistant to single-event transient. The clock driving circuit resistant to single-event transient consists of two kinds of inverters: double-input double-output (DIDO) inverter and double-input single-output (DISO) inverter, the specific number of the two kinds of inverters used, and the connection way thereof are determined by the complexity of a designed circuit and a clock design method used by the designed circuit. The DIDO inverter and DISO inverter both comprise two PMOS transistors and two NMOS transistors. In a clock distribution network based on double-input double-output and double-input single-output clock inverters, the probability that single-event transient pulses generated on the DIDO inverter are propagated to clock leaf nodes is zero. Therefore, the invention significantly improves the ability of the clock distribution network to resist single-event transient, effectively reducing the probability that the clock distribution network generates single-event transient pulses on the respective clock leaf nodes after being bombarded by radiation particles. Thus, the reinforced clock circuit resistant to single-event transient of the present invention is superior to a conventional unreinforced clock circuit in single-event transient resistance.