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minimum footprint standard cell circuits for reduced area
minimum footprint standard cell circuits for reduced area
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机译:最小占位面积的标准单元电路,可减小面积
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摘要
standard minimum-lane, reduced-area cell circuits are provided. in one aspect, a minimum track pattern cell circuit employs a first high aspect ratio voltage rail disposed over a first half track and configured to provide a first voltage (e.g., vdd) to the track pattern cell circuit minimum. a second high aspect ratio tension rail is disposed on a second half track substantially parallel to the first high aspect ratio tension rail. The second high aspect ratio voltage rail is configured to provide a second voltage lower than the first voltage (e.g., vss) for the minimum track standard cell circuit. The standard minimum track cell circuit employs multiple tracks arranged between the first and second half tracks. The number of trails may be limited based on particular factors. Track minimization reduces area compared to standard standard cell circuits.
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