首页> 外国专利> SEMICONDUCTOR DEVICES EMPLOYING FIELD EFFECT TRANSISTORS (FETS) WITH MULTIPLE CHANNEL STRUCTURES WITHOUT SHALLOW TRENCH ISOLATION (STI) VOID-INDUCED ELECTRICAL SHORTS

SEMICONDUCTOR DEVICES EMPLOYING FIELD EFFECT TRANSISTORS (FETS) WITH MULTIPLE CHANNEL STRUCTURES WITHOUT SHALLOW TRENCH ISOLATION (STI) VOID-INDUCED ELECTRICAL SHORTS

机译:具有多通道结构且无浅沟槽隔离(STI)空隙引起的电气短路的半导体器件制造场效应晶体管(FET)

摘要

Semiconductor devices employing Field Effect Transistors (FETs) with multiple channel structures without shallow trench isolation (STI) void-induced electrical shorts are disclosed. In one aspect, a semiconductor device is provided that includes a substrate. The semiconductor device includes channel structures disposed over the substrate, the channel structures corresponding to a FET. An STI trench is formed between each corresponding pair of channel structures. Each STI trench includes a bottom region filled with a lower quality oxide, and a top region filled with a higher quality oxide. The lower quality oxide is susceptible to void formation in the bottom region during particular fabrication steps of the semiconductor device. However, the higher quality oxide is not susceptible to void formation. Thus, the higher quality oxide does not include voids with which a gate may electrically couple to other active components, thus preventing STI void-induced electrical shorts in the semiconductor device.
机译:公开了采用具有多沟道结构而没有浅沟槽隔离(STI)空隙引起的电短路的场效应晶体管(FET)的半导体器件。在一个方面,提供了一种包括衬底的半导体器件。半导体器件包括设置在衬底上方的沟道结构,该沟道结构对应于FET。在每个对应的沟道结构对之间形成STI沟槽。每个STI沟槽包括填充有较低质量的氧化物的底部区域和填充有较高质量的氧化物的顶部区域。在半导体器件的特定制造步骤期间,较低质量的氧化物易于在底部区域中形成空隙。但是,较高质量的氧化物不易形成空隙。因此,较高质量的氧化物不包括空隙,栅极可利用该空隙将其电耦合至其他有源组件,从而防止了半导体器件中由STI空隙引起的电短路。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号