首页> 外国专利> INTEGRATION OF HIGH DENSITY CROSS-POINT MEMORY AND CMOS LOGIC FOR HIGH DENSITY LOW LATENCY ENVM AND EDRAM APPLICATIONS

INTEGRATION OF HIGH DENSITY CROSS-POINT MEMORY AND CMOS LOGIC FOR HIGH DENSITY LOW LATENCY ENVM AND EDRAM APPLICATIONS

机译:高密度交叉点存储器和CMOS逻辑的集成,可实现高密度低延迟环境和EDRAM应用

摘要

An embedded cross-point memory array is described. In an example, an integrated circuit structure includes a first die including a cross-point memory array comprising separate memory blocks, the memory blocks including orthogonally arranged conductive lines, and memory elements at cross-sections of the conductive lines. A first plurality of sockets is on the first die adjacent to the memory blocks, the first plurality of sockets comprising a first plurality of pads that connect to at least a portion to the conductive lines of the corresponding memory block. A second die includes logic circuitry and a second plurality of sockets comprising a second plurality of pads at least partially aligned with positions of the first plurality of pads on the first die. A top of the first die and a top of the second die face one another, wherein the first plurality of pads are bonded with the second plurality pads to directly connect the cross-point memory array to the logic circuitry.
机译:描述了嵌入式交叉点存储器阵列。在示例中,集成电路结构包括第一管芯,该第一管芯包括具有单独的存储块的交叉点存储阵列,该存储块包括正交布置的导线,以及在导线的截面处的存储元件。第一多个插座在第一裸片上与存储块相邻,第一多个插座包括第一多个焊盘,该第一多个焊盘连接到对应的存储块的导线的至少一部分。第二管芯包括逻辑电路和第二多个插座,第二插座包括第二多个焊盘,第二多个焊盘至少部分地与第一多个焊盘上的第一多个焊盘的位置对准。第一管芯的顶部和第二管芯的顶部彼此面对,其中第一多个焊盘与第二多个焊盘结合以将交叉点存储器阵列直接连接至逻辑电路。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号