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首页> 外文期刊>Electron Devices, IEEE Transactions on >Fully CMOS-Compatible 1T1R Integration of Vertical Nanopillar GAA Transistor and Oxide-Based RRAM Cell for High-Density Nonvolatile Memory Application
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Fully CMOS-Compatible 1T1R Integration of Vertical Nanopillar GAA Transistor and Oxide-Based RRAM Cell for High-Density Nonvolatile Memory Application

机译:垂直纳米柱GAA晶体管和基于氧化物的RRAM单元完全兼容CMOS的1T1R集成,适用于高密度非易失性存储应用

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摘要

A fully CMOS-compatible vertical nanopillar gate-all-around transistor integrated with a transition-oxide-based resistive random access memory cell to realize $ hbox{4}F^{2}$ footprint has been demonstrated and systematically characterized. The nanopillar transistor exhibits excellent transfer characteristics with diameter scaled down to a few tens of nanometer. Three types of resistive switching behavior have been observed in the fabricated one-transistor one-resistor cell, namely, preforming ultralow-current switching, unipolar switching, and bipolar switching after forming process. A reset current of only 200 pA has been observed in the preforming ultralow-current switching, while for the unipolar and bipolar switching modes after forming process, good memory performance and operation parameter uniformity are demonstrated. Furthermore, reset current is found to decrease with reducing nanopillar transistor design diameter, which is beneficial for circuit power consumption consideration.
机译:已经证明并系统地表征了与基于过渡氧化物的电阻式随机存取存储单元集成在一起的,完全兼容CMOS的垂直纳米柱状全能栅极全能晶体管。纳米柱晶体管具有出色的传输特性,直径可缩小到几十纳米。在制造的一晶体管一电阻单元中已经观察到三种类型的电阻开关行为,即,在形成工艺之后预形成超低电流开关,单极开关和双极开关。在预成型的超低电流开关中仅观察到200 pA的复位电流,而在成型过程之后的单极性和双极性开关模式下,则显示出良好的存储性能和工作参数均匀性。此外,发现复位电流随着纳米柱晶体管设计直径的减小而减小,这对于电路功耗的考虑是有益的。

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