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3 method of testing 3D type multi layer semiconductor device in the process of stacking chip
3 method of testing 3D type multi layer semiconductor device in the process of stacking chip
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机译:3在堆叠过程中测试3D型多层半导体器件的方法
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摘要
After the stacking process step of performing the upper chip stacking process on the lower chip in the process of manufacturing the three-dimensional stacked semiconductor device, a pattern inspection device having an auto-focus function with the upper chip stacked, Detecting a change in height position of the upper chip surface by performing optical inspection while relatively moving the position on the upper chip position and determining a chip stacking failure at the upper chip position based on the detected result, An interim inspection method for a semiconductor device chip stacking process is disclosed. According to the method of the present invention, in the step of forming a three-dimensional laminated semiconductor device, a portion of a defective chip, which may cause a defective vertical connection, is identified through optical inspection of a portion exposed to the outside while stacking chips, It is possible to reduce the process burden and the cost, and to reduce the defective ratio of the completed three-dimensional stacked semiconductor device.
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