首页> 外国专利> Methods for Aligning Photolithography Masks and Corresponding Processes for Manufacturing UEFA Integrated Circuits for Semiconductor Materials

Methods for Aligning Photolithography Masks and Corresponding Processes for Manufacturing UEFA Integrated Circuits for Semiconductor Materials

机译:用于制造用于半导体材料的UEFA集成电路的对准光刻掩模的方法和相应的工艺

摘要

A photomask alignment method for the manufacturing process of integrated circuits of wafers (20) of semiconductor materials, at least the first criterion on the wafers (20) by a single photolithography process at the first level. Specifying at least one aligned structure (10; 10') with a mark (4a) and a second reference mark (4b) and, at levels above the first level, a first area mask (11a). , Aligned with at least the first reference mark (4a) and used with the first region mask (11a) for photolithography formation of the integrated circuits inside each of the dice (22) of the wafer (20). The second region mask (11b) is aligned with respect to at least one second reference mark (4b), and the first region mask (11a) and the second region mask (11b) are superposed on each other. A photomask alignment method comprising arranging on a wafer (20) adjacent to each other in a first coupling direction.
机译:一种光掩模对准方法,用于在第一级通过单个光刻工艺制造半导体材料的晶片(20)的集成电路,至少在晶片(20)上具有第一标准。指定至少一个对齐的结构(10; 10'),该结构具有标记(4a)和第二参考标记(4b),并且在高于第一层的位置上指定第一区域遮罩(11a)。至少与第一参考标记(4a)对准,并与第一区域掩模(11a)一起用于光刻形成晶片(20)的每个管芯(22)内部的集成电路。第二区域掩模(11b)相对于至少一个第二参考标记(4b)对准,并且第一区域掩模(11a)和第二区域掩模(11b)彼此叠置。一种光掩模对准方法,包括在第一耦合方向上彼此相邻地布置在晶片(20)上。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号