Layout techniques for high-speed and low-power signal paths in integrated circuits with small channel devices

摘要

Certain aspects of the present disclosure generally relate to layout techniques for high-speed and low-power signal paths in integrated circuits with small channel devices. More specifically, according to certain aspects, an integrated circuit may comprise a plurality of layers, wherein at least a portion of the plurality of layers is configured to form a power/ground grid having odd-numbered metal layers and even-numbered metal layers, wherein a majority of traces of the even-numbered metal layers have a first orientation, and wherein a majority of traces of at least one of the odd-numbered metal layers are oriented parallel to the majority of the traces of the even-numbered metal layers; and one or more circuit components configured to use high-speed, low-power signals carried by one or more of the plurality of layers and to be powered by the power/ground grid.