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Methods of forming integrated circuits with solutions to interlayer dielectric void formation between gate structures
Methods of forming integrated circuits with solutions to interlayer dielectric void formation between gate structures
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机译:形成具有在栅极结构之间形成层间介电空隙的解决方案的集成电路的方法
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摘要
Methods of forming integrated circuits are provided herein. In an embodiment, a method of forming an integrated circuit includes providing a semiconductor substrate. The semiconductor substrate includes a plurality of gate structures that have sidewalls spacers disposed adjacent to the gate structures. A gap is defined between sidewall spacers of adjacent gate structures. The method proceeds with decreasing an aspect ratio between a width of the gap at an opening thereto and a depth of the gap, wherein an aspect ratio between a width of the gap at a base of the sidewall spacers and the depth of the gap remains substantially unchanged after decreasing the aspect ratio between the width of the gap at the opening thereto.
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