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Systems and methods for leveraging path delay variations in a circuit and generating error-tolerant bitstrings
Systems and methods for leveraging path delay variations in a circuit and generating error-tolerant bitstrings
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机译:利用电路中的路径延迟变化并生成容错比特串的系统和方法
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摘要
A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates techniques to deal with bias. A unique feature of HELP is that it may compare data measured from different test structures. HELP may be implemented in existing FPGA platforms. HELP may leverage both path stability and within-die variations as sources of entropy.
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