首页>
外国专利>
GENERATING SYNCHRONOUS DIGITAL CIRCUITS FROM SOURCE CODE CONSTRUCTS THAT MAP TO CIRCUIT IMPLEMENTATIONS
GENERATING SYNCHRONOUS DIGITAL CIRCUITS FROM SOURCE CODE CONSTRUCTS THAT MAP TO CIRCUIT IMPLEMENTATIONS
展开▼
机译:根据源代码结构生成与电路实现相对应的同步数字电路
展开▼
页面导航
摘要
著录项
相似文献
摘要
A multi-threaded imperative programming language includes language constructs that map to circuit implementations. The constructs can include a condition statement that enables a thread in a hardware pipeline to wait for a specified condition to occur, identify the start and end of a portion of source code instructions that are to be executed atomically, or indicate that a read-modify-write memory operation is to be performed atomically. Source code that includes one or more constructs mapping to a circuit implementation can be compiled to generate a circuit description. The circuit description can be expressed using hardware description language (HDL), for instance. The circuit description can, in turn, be used to generate a synchronous digital circuit that includes the circuit implementation. For example, HDL might be utilized to generate an FPGA image or bitstream that can be utilized to program an FPGA that includes the circuit implementation associate with the language construct.
展开▼