首页> 外国专利> Under-Cut Via Electrode for Sub 60nm Etchless MRAM Devices by Decoupling the Via Etch Process

Under-Cut Via Electrode for Sub 60nm Etchless MRAM Devices by Decoupling the Via Etch Process

机译:通过解耦通路蚀刻工艺,将亚60nm以下无蚀刻MRAM器件的通路下通路电极

摘要

A method for fabricating a magnetic tunneling junction (MTJ) structure is described. A first dielectric layer is deposited on a bottom electrode and partially etched through to form a first via opening having straight sidewalls, then etched all the way through to the bottom electrode to form a second via opening having tapered sidewalls. A metal layer is deposited in the second via opening and planarized to the level of the first dielectric layer. The remaining first dielectric layer is removed leaving an electrode plug on the bottom electrode. MTJ stacks are deposited on the electrode plug and on the bottom electrode wherein the MTJ stacks are discontinuous. A second dielectric layer is deposited over the MTJ stacks and polished to expose a top surface of the MTJ stack on the electrode plug. A top electrode layer is deposited to complete the MTJ structure.
机译:描述了一种制造磁性隧道结(MTJ)结构的方法。第一介电层沉积在底部电极上并被部分蚀刻以形成具有直侧壁的第一通孔,然后一直蚀刻到底部电极以形成具有锥形侧壁的第二通孔。金属层沉积在第二通孔开口中并平坦化至第一介电层的水平。去除剩余的第一电介质层,从而在底部电极上留下电极塞。 MTJ叠层沉积在电极塞和底部电极上,其中MTJ叠层是不连续的。将第二介电层沉积在MTJ叠层上方并进行抛光以暴露MTJ叠层在电极塞上的顶表面。沉积顶部电极层以完成MTJ结构。

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