首页> 外国专利> FORMATION OF DIELECTRIC LAYER AS ETCH-STOP FOR SOURCE AND DRAIN EPITAXY DISCONNECTION

FORMATION OF DIELECTRIC LAYER AS ETCH-STOP FOR SOURCE AND DRAIN EPITAXY DISCONNECTION

机译:形成电介质层作为源极和漏极外溢断开的止停点

摘要

A technique relates to a semiconductor device. A stack is formed over a bottom sacrificial layer, the bottom sacrificial layer being on a substrate. At least a portion of the bottom sacrificial layer is removed so as to create openings. Inner spacers are formed in the openings adjacent to the bottom sacrificial layer. The bottom sacrificial layer is removed so as to create a void. An isolation layer formed on the inner spacers so as to form an air gap, the isolation layer and the air gap being positioned between the stack and the substrate.
机译:一种技术涉及半导体器件。在底部牺牲层上方形成堆叠,该底部牺牲层在衬底上。底部牺牲层的至少一部分被去除以便产生开口。在与底部牺牲层相邻的开口中形成内部间隔物。去除底部牺牲层以产生空隙。隔离层形成在内部间隔物上以形成气隙,该隔离层和气隙位于叠层和基板之间。

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