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FORMATION OF DIELECTRIC LAYER AS ETCH-STOP FOR SOURCE AND DRAIN EPITAXY DISCONNECTION
FORMATION OF DIELECTRIC LAYER AS ETCH-STOP FOR SOURCE AND DRAIN EPITAXY DISCONNECTION
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机译:形成电介质层作为源极和漏极外溢断开的止停点
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摘要
A technique relates to a semiconductor device. A stack is formed over a bottom sacrificial layer, the bottom sacrificial layer being on a substrate. At least a portion of the bottom sacrificial layer is removed so as to create openings. Inner spacers are formed in the openings adjacent to the bottom sacrificial layer. The bottom sacrificial layer is removed so as to create a void. An isolation layer formed on the inner spacers so as to form an air gap, the isolation layer and the air gap being positioned between the stack and the substrate.
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