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Omic contact of power semiconductor device and manufacturing method thereof
Omic contact of power semiconductor device and manufacturing method thereof
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机译:功率半导体器件的光触点及其制造方法
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摘要
The present invention relates to an ohmic junction of a power semiconductor device and a method of manufacturing the same, wherein a Ga 2 O 3 region doped with an n-type having a specific resistance of 100 mΩ·cm or less, a metal layer deposited on the substrate, and a lower portion of the metal layer And an IMO layer (Interface Modified Ohmic) having an ohmic contact resistance of 5×10 -7 Ω·cm 2 or less diffused into the Ga 2 O 3 region.
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机译:功率半导体器件的欧姆结及其制造方法技术领域本发明涉及功率半导体器件的欧姆结及其制造方法,其中掺杂有n型的n型掺杂的Ga 2 Sub> O 3 Sub>区电阻率为100mΩ·cm或更小,沉积在基板上的金属层,金属层的下部和欧姆接触电阻为5×10 -7 <的IMO层(Interface Modified Ohmic) / Sup>Ω·cm 2 Sup>或以下扩散到Ga 2 Sub> O 3 Sub>区域中。
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