Recessed Channel Type Transistor having Improved Current-leakage Characteristics

摘要

A gate 8 in which a predetermined portion is buried in a state in which a gate insulating layer 7 is interposed in the silicon body 2 between the drain region and the source region and the silicon body 2 between the drain region and the source region. Regarding a transistor having a non-planar channel including a, the drain region and the source region are portions of the silicon body 2 doped with a doping material, and the silicon body 2 is filled with an insulator 10. , Based on the height direction (Y-axis direction) of the silicon body 2, the upper surface of the insulator 10 is higher than the lower surface of the gate insulating film 7 embedded in the silicon body 2 At the same time, it is characterized by having a non-planar channel, characterized in that located in the drain region or the source region.