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METHOD FOR GROWTH OF EPITAXIAL LAYERS OF SILICON CARBIDE OF P-TYPE CONDUCTIVITY WITH LOW DENSITY OF BASAL DISLOCATIONS

机译:低位错位P型导电性碳化硅外延层的生长方法

摘要

FIELD: electrical engineering.;SUBSTANCE: invention relates to semiconductor engineering and can be used in the growth of epitaxial layers of silicon carbide (SiC) with low density of basal dislocations. Method consists in that, as well as in the known method for growth of epitaxial layers SiC the SiC substrate is used, the surface of which is misoriented relative to the crystallographic plane of Miller-Bravais (1120) by more than 0°, but not more than by 8°. Surface of substrate on one side is etched in hydrogen, silane or argon at temperature of not less than 1,450 °C and not more than 1,800 °C and hydrogen pressure of not less than 30 mbar and not more than 500 mbar for not more than 90 minutes, thereafter, a buffer layer of SiC of p-type conductivity with thickness of not less than 1 mcm and not more than 50 mcm is grown on the etched surface of the substrate, on the surface of which an epitaxial layer of SiC of p-type conductivity is grown.;EFFECT: invention ensures production of non-defect layers of silicon carbide.;1 cl, 2 dwg, 1 tbl
机译:技术领域本发明涉及半导体工程,并且可以用于生长具有低基极位错密度的碳化硅(SiC)的外延层。该方法包括,以及在用于生长外延层SiC的已知方法中,使用SiC衬底,该衬底的表面相对于Miller-Bravais(1120)的晶面取向不正确,倾斜角度大于0°,但不超过0°。大于8°。在氢气,硅烷或氩气中,在不低于1,450°C至不超过1,800°C的温度下,以及氢气压力不小于30 mbar和不大于500 mbar的情况下,对一侧的基板表面进行蚀刻(不大于90) 5分钟后,在基板的蚀刻表面上生长厚度不小于1mcm且不大于50mcm的p型导电性SiC缓冲层,在该表面上形成p为SiC的外延层。型导电性的增长;效果:发明确保了碳化硅无缺陷层的生产。1cl,2 dwg,1 tbl

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