Reduction of series resistance between source and / or drain zones and a channel zone

摘要

One method of reducing series resistance for transistors includes forming a conductive gate over and insulated from a semiconductor substrate, forming source and / or drain extension regions within the substrate and adjacent to corresponding source and / or drain regions, and forming Source and / or drain zones within the substrate. The source and / or drain extension zones are formed from a material alloyed with a first dopant and a second dopant, the first dopant configured to have a lattice structure of the material from which the source and / or Drain expansion zones are formed, enlarged.