INTEGRATED CIRCUIT COMPRISING A POWER LIMITER AFFECTING THE PARASITE DIODE OF BIPOLAR TECHNOLOGIES

摘要

This integrated circuit comprises a power limiter (110) comprising a pair of diodes (11, 12) connected in parallel with each other and in "head-to-tail" configuration, each diode being made in a NWELL box or a box PWELL delimited in a substrate of the integrated circuit, the substrate being connected to a ground of the integrated circuit, the diodes being connected between a first line (21) and a second line (22) respectively extending between an input terminal and a output terminal of the limiter, each of the first and second lines being polarized by applying a potential developed from a voltage signal to be limited (S) and a common mode potential (VCM), a value of said potential common mode being set according to a threshold voltage activation of a parasitic diode (14) existing between the substrate and the box within which is formed one of the diodes (12).