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A compatible MOS-bipolar device technology for low-power integrated circuits

机译:适用于低功率集成电路的兼容MOS双极器件技术

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A major problem in the design of low-power integrated circuits occurs in the need for high-value resistors occupying a small area. Another problem area exists in the need for active devices capable of operation at extremely low current levels. This paper consists largely of an attack upon these problems. The relative merits of various resistor structures, including the MOS resistor, are discussed, and their electrical characteristics are compared. Active device design for low-power circuit operation is also discussed, and the design of a bipolar transistor structure is described which optimizes the current gain at low current levels. Next, a process technology is described which allows MOS resistors, double-diffused planar epitaxial NPN transistors, and diffused junction isolations to be realized within the same integrated cricuit structure.
机译:在低功率集成电路设计中的主要问题出现在需要占用小面积的高值电阻器的情况下。另一个需要解决的问题是需要能够在极低电流水平下工作的有源器件。本文主要包括对这些问题的攻击。讨论了各种电阻器结构(包括MOS电阻器)的相对优点,并比较了它们的电气特性。还讨论了用于低功率电路操作的有源器件设计,并描述了双极晶体管结构的设计,该结构在低电流水平下优化了电流增益。接下来,描述一种处理技术,该技术允许在相同的集成电路结构内实现MOS电阻器,双扩散平面外延NPN晶体管和扩散结隔离。

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