MARTE based model driven design methodology for targeting dynamically reconfigurable FPGA based SoCs

摘要

The works presented in this dissertation are carried out in the context of System-on-Chip (SoC) and embedded system design, particularly dedicated to the domain of dynamic reconfiguration related to these complex systems. We present a design flow based on Model Driven Engineering (MDE) and the MARTE SoC Co-Design profile, to specify and implement these SoCs; in order to elevate the abstraction levels and to decrease system complexity. The first contribution related to this thesis is identifying parts of dynamically reconfigurable SoCs that can be modeled at the high abstraction levels. This thesis targets the high level application models to be treated as dynamically swapple regions of a reconfigurable SoC, and proposes generic control models for managing these regions during runtime execution. While these semantics can be introduced at several high abstraction levels of a SoC Co-Design framework, we specially emphasis on fusion at the deployment level, that links intellectual properties to the modeled high level design components. Additionally, these concepts have been integrated into the MARTE metamodel to provide a suitable extension for expressing reconfigurability features at the high level modeling. The second contribution is the proposal of an intermediate metamodel, that isolates the concepts present at the RTL. This metamodel integrates concepts responsible for the hardware execution of the modeled applications, and enriches the control semantics, resulting in creation of a dynamically reconfigurable hardware accelerator with several available implementations. Finally, using the MDE model transformations, we are able to generate HDL code equivalent to the different implementations of the reconfigurable accelerator as well as C langauge source code related to the reconfiguration controller responsible for the switching between the different implementations. Finally, our design flow was verified successfully in a case study related to an anti-collision radar detection system. A key integral component of this system was modeled using the extended MARTE specifications and the generated code was used in the conception and implementation of a dynamically reconfigurable FPGA based SoC.