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Vers la reconfiguration dynamique dans les systèmes embarqués: de la modélisation à l'implémentation

机译:在嵌入式系统中实现动态重新配置:从建模到实现

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摘要

This manuscript summarizes my research activities since my thesis defended September 2002. Some of my works presented here are completed; others are in progress or still at an exploratory stage. Throughout these years, my works were in the context of software/hardware co-design of intensive signal processing specific Sacs. The complexity of systems targeting such application domain continues to expand, in recent years. Indeed, the growing needs in terms of computing power and memory storage of intensive signal processing applications, makes designing SoCs dedicated to them very tedious, requiring considerable time and effort. Thus, the guideline of my work has always been to provide methods and tools for the design of such Sacs, allowing maximum automation, increasing designer's productivity and reducing time-to-the market of designed systems. So I concentrated my research effort on three main aspects: high level modeling by providing meta-models and profiles based on the MARTE standard; distributed simulation platforms, supporting interoperability between different abstraction levels while allowing accurate energy consumption estimation; and finally production of design tools based on automatic model to model transformations model and MDE approach. Being convinced of the great potential of partially and dynamically reconfigurable FPGAs, I focus more and more my work to target such architectures. Thus, my future work will certainly be in the same direction, particularly in the context of the ANR project FAMOUS. Thus, the main concern of my research will include: modeling (based on MARTE) of dynamic reconfiguration in all its aspects (architecture, application, association, deployment and partitioning), simulation of FPGAs and the estimation of their consumption (to drive architectures exploration), and finally the integration into design tools based on standards (such as MDE and MARTE).
机译:这份手稿总结了自2002年9月论文答辩以来我的研究活动。其他人正在进行或仍处于探索阶段。这些年来,我的工作是在软件/硬件协同设计中对特定的Sacs进行密集的信号处理。近年来,针对此类应用程序域的系统的复杂性不断扩大。实际上,在密集型信号处理应用程序的计算能力和内存存储方面不断增长的需求,使得设计专用于它们的SoC非常繁琐,需要大量的时间和精力。因此,我的工作指南始终是为此类Sacs设计提供方法和工具,以实现最大程度的自动化,提高设计人员的生产率并缩短设计系统的上市时间。因此,我将研究工作集中在三个主要方面:通过提供基于MARTE标准的元模型和配置文件进行高级建模;分布式仿真平台,支持不同抽象级别之间的互操作性,同时允许准确的能耗估算;最后生产基于自动模型的设计工具,以模型转换模型和MDE方法。我深信部分可动态重新配置的FPGA的巨大潜力,因此我将越来越多的工作重点放在此类架构上。因此,我的未来工作肯定会朝着同一个方向发展,特别是在ANR项目FAMOUS的情况下。因此,我研究的主要内容将包括:动态重构的各个方面(架构,应用,关联,部署和分区)的建模(基于MARTE),FPGA的仿真及其消耗的估计(以推动架构探索) ),最后集成到基于标准的设计工具中(例如MDE和MARTE)。

著录项

  • 作者

    Meftali Samy;

  • 作者单位
  • 年度 2010
  • 总页数
  • 原文格式 PDF
  • 正文语种 fr
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