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Design and implementation of a private and public key crypto processor for next-generation it security applications

机译:面向下一代IT安全应用程序的私钥和公钥加密处理器的设计和实现

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摘要

The growing problem of breaches in information security in recent years has created a demand for earnest efforts towards ensuring security in electronic systems. The successful deployment of these electronic systems for ecommerce, Internet banking, government online services, VPNs, mobile commerce, Public Key Infrastructure (PKI), etc., is dependent on the effectiveness of the security solutions. These security concerns are further compounded when resource-constrained environments and real-time speed requirements have to be considered in nextgeneration applications. Consequently, these IT security issues have been a subject of intensive research in areas of computing, networking and cryptography these last few years. This paper presents the design and implementation of a crypto processor, a special-purpose embedded system optimized for the execution of cryptographic algorithms in hardware. This cryptosystem can be used in wide range of electronic devices, which include PCs, PDAs, wireless handsets, smart cards, hardware security modules, network appliances, such as routers, gateways, firewalls, storage and web servers. The proposed crypto processor consists of a 32-bit RISC processor block and several IP cores that accelerates private and public key crypto computations, LZSS data compression, SHA-1 hashing, and wide-operand modular arithmetic computation. These dedicated crypto IP cores, which are implemented as coprocessors, permit high-speed execution of the compute-intensive operations in AES encryption, ECC and RSAbased digital signature, and other PKI-enabling functions. The proposed embedded system is designed using SoC technology, with hardware described in VHDL and the embedded software coded in C. The resulting cryptohardware is implemented into a single Altera Stratix FPGA microchip. The operating system frequency is set to 40 MHz. A demonstration application prototype in the form of a real-time secure e-document application has been developed to verify the functionality and validate the embedded system.
机译:近年来,日益严重的信息安全违规问题引起了对确保电子系统安全性的认真努力的需求。这些电子系统在电子商务,互联网银行,政府在线服务,VPN,移动商务,公共密钥基础结构(PKI)等方面的成功部署取决于安全解决方案的有效性。当在下一代应用程序中必须考虑资源受限的环境和实时速度要求时,这些安全问题会更加复杂。因此,最近几年,这些IT安全问题已成为计算,网络和密码学领域的深入研究的主题。本文介绍了密码处理器的设计和实现,密码处理器是为在硬件中执行密码算法而优化的专用嵌入式系统。该密码系统可用于各种电子设备,包括PC,PDA,无线手持设备,智能卡,硬件安全模块,网络设备(例如路由器,网关,防火墙,存储和Web服务器)。拟议的加密处理器由32位RISC处理器模块和几个IP内核组成,这些IP内核可加速私钥和公钥加密计算,LZSS数据压缩,SHA-1散列和宽操作数模块化算术计算。这些专用的加密IP内核(实现为协处理器)允许在AES加密,基于ECC和RSA的数字签名以及其他支持PKI的功能中高速执行计算密集型操作。拟议的嵌入式系统是使用SoC技术设计的,其硬件以VHDL描述,嵌入式软件以C编码。所得的加密硬件被实现为单个Altera Stratix FPGA芯片。操作系统频率设置为40 MHz。已经开发了一种实时安全电子文档应用程序形式的演示应用程序原型,以验证功能并验证嵌入式系统。

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