Etude de la fiabilité des mesures électriques par la microscopie à force atomique sur couches diélectriques ultra-minces : Développement d'une technique de pompage de charge résolue spatialement pour la caractérisation des défauts d'interface

摘要

The rapid progress of the microelectronic is obtained by the strong reduction of the dimensions of the MOS transistor. In order to reduce the leakage currents SiO2 is nox replaced by HfO2, but new dielectrics with a high permittivity (high-k) will have to be integrated in the future so that the progession continues. The atomic force microscope (AFM) in Conductive-AFM (C-AFM) mode is an ideal tools for the electrical characterization of thin oxide films at the nanometric scale. In our work, we have tried to study the limits of the C-AFM. C-AFM consists in using an AFM tip as a top electrode in order to perform Intensity-Current (I-V) curves or mapping the current. We have tried and identify the phenomenon which lead to the degradation of the dielectric layer during the application of the positive voltage bias on the tip, which results in a deformation of the surface under study. We have shown that it is a thermal effect due to a large density of current, which is different from dielectric induced breakdown epitaxy (DBIE) observed on the devices, and which may even lead to the degradation of the susbstrate at the interface. This phenomon is favored by the presence of water on the surface although it is not its consequence. This confirms that such electrical measurements should be performed in ultra-high vacuum in spite of the consequences in terms of complexity of the measurement setup. As a consequence, the study of the dielectric material are questionned since the degradation process is partly due to the AFM technique itself and does not allow to extrapolate easily the behaviour of the integrated device. Moreover, the statistical study of the degradation of the layer (Weibull), commonly used, is affected by a bias (measurements are interdependent). In the same way, the modeling of the conduction through the layer must be questionned because the surface of the electrical contact between the tip and the dielectric layer remains a very variable parameter. The charge pumping technique, which consists in caracterizing the traps at the semiconductor / dielectric interface by filling/emptying them with the application of an alternating gate voltage. It allows to extract the states density (Dit(E) and the capture cross section (σ(E)) but does not provide any information about their repartition on the interface. So, we have adapted this technique to the scanning probe microscopy with the conducting AFM probe as a gate. Using gate-less transistors fabricated in the frame of this work, we have demonstrated the feasability of this technique with a satisfying agreement with macroscopic measurements. We are able to measure a signal that can be related to charge pumping. However, the signal is distorted compared to macroscopic measurements. Modeling is needed because in our case, minority carriers must travel from source to drain via a non polarised area. As a perspective, an energetically resolved method to map the interfacial defects might be developed.