Convolutiegebaseerde modeleringsmethodologie voor de snelle thermische analyse van driedimensionaal gestapelde elektronische componenten

摘要

The relevance of accurate predictions of the thermal behavior of microelectronic systems has been increasing since the introduction of 3D integrated circuits (3D-ICs). Due to the vertical stacking of the active dies the reliability issues related to high temperature and temperature gradients are, indeed, exacerbated. Different thermal modeling strategies have been developed with the aim of providing quick estimations of the device temperature under operating conditions. It is, indeed, important to be able to quickly compare the thermal impact of different design and technological parameters already during the design phase.In this thesis, an easy-to-use fast thermal modeling methodology based on the Green's function theory is presented. It provides highly resolved temperature maps on selected levels (or selected points), avoiding the calculation in locations that are not thermally significant and reducing, therefore, the computational time. The model is able to deal with both the steady state and the transient regime and it proved to be two orders of magnitude faster than conventional finite element methods, maintaining the error on peak temperatures below 5%.The core of the algorithm is constituted by the convolution between 1) the thermal response of the system to localized and impulsive power dissipation and 2) the actual dissipated power map. However, this basic convolution approach is valid only for stack (layered) structures in which multiple layers, of homogeneous material and with infinite horizontal size, are placed on top of each other. The “method of images” is used to take into account the finite dimension of the stack while correction strategies are applied to account for the thermal impact of specific µbump layouts (only in case of a two dies stack in the steady state regime) and of the package. Moreover, an a posteriori mathematical transformation, the Kirchhoff transformation, has been proposed to deal with the temperature dependency of the silicon thermal conductivity. By overcoming the limitations of the basic convolution approach, the developed fast thermal model is able to deal with realistic 3D-IC configurations. This has been proved by a successful experimental validation with respect to measurement data.The model has also been extended to deal with other geometries commonly available in microelectronic applications (side by side integration on an interposer and stack of dies with different sizes). Moreover, to demonstrate the applicability and the easiness-of-use of the developed methodology, the model has been applied to perform realistic analyses that might be needed during the design phase of an IC.It is, therefore, concluded that the developed fast thermal model can be a valid alternative to conventional thermal modeling strategies for 3D-ICs and related geometries: the computational time is, indeed, strongly reduced and high accuracy is maintained.