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Analysis of Symmetric and Asymmetric Multilevel Inverter Topologies Using Reduced Number of Switching Devices Circuit Structure

机译：用减少交换装置电路结构分析对称和不对称多级逆变器拓扑结构

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M. H. Yatim; A. Ponniran; A. A. Bakar; A. N. Kasiran; K. R. Noor; J.N. Jumadril;
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年度 2018
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1. Symmetric and asymmetric multilevel inverter topologies with reduced switching devices [J] . Ebrahim Babaei, Mohammad Farhadi Kangarlu, Farshid Najaty Mazgar Electric power systems research . 2012,第期

机译：减少开关设备的对称和非对称多电平逆变器拓扑
2. Improved configuration for symmetric and asymmetric multilevel inverters with reduced number of circuit devices [J] . Mohammad Reza Jannati Oskuee, Shahla Nikpour, Sajad Najafi Ravadanegh, International journal of ambient energy . 2018,第1a4期

机译：减少电路设备数量的对称和非对称多电平逆变器的改进配置
3. Symmetrical and Asymmetrical Reduced Device Multilevel Inverter Topology [J] . Anilkumar Chappa, Shubhrata Gupta, Lalit Kumar Sahu, Emerging and Selected Topics in Power Electronics, IEEE Journal of . 2021,第1期

机译：对称和不对称的减少装置多级逆变器拓扑
4. A novel symmetrical multilevel inverter topology with reduced switching devices using different PWM techniques [C] . Kumar Abhishek, Bansal Praveen International Conference on Electrical, Electronics, Signals, Communication and Optimization . 2015

机译：一种新颖的对称多电平逆变器拓扑，使用不同的PWM技术减少了开关设备
5. A voltage space approach to developing a soft-switched inverter topology with low device voltage stress. [D] . McClelland, Bradley Scott. 1999

机译：一种电压空间方法，用于开发具有低器件电压应力的软开关逆变器拓扑。
6. Review on Driving Circuits for Wide-Bandgap Semiconductor Switching Devices for Mid- to High-Power Applications [O] . Chao-Tsung Ma, Zhen-Huang Gu 2021

机译：用于中频到高功率应用的宽带隙半导体开关装置的驱动电路综述
7. Analysis of Logic Gates for Generation of Switching Sequence in Symmetric and Asymmetric Reduced Switch Multilevel Inverter [O] . Kanike Vinod Kumar, R. Saravana Kumar 2019

机译：对称和非对称减少开关多级逆变器中切换序列产生逻辑门的分析

Analysis of Symmetric and Asymmetric Multilevel Inverter Topologies Using Reduced Number of Switching Devices Circuit Structure

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