Design of Totally Self-Checking Asynchronous Sequential Machines.

摘要

Techniques have been developed for designing asynchronous machines that indicate faults by assuming error states. Design methods have also been found for the construction of self-checking combinational networks which indicate errors either in their coded inputs or in their own circuitry. The paper presents a means of uniting these two methods to yield asynchronous sequential machines which are self-checking. The problems inherent in the individual design procedures for the two methods as well as those which arise in making the two methods compatible are discussed.