BOK-Underfill Optimization for FPGA Package/Assembly.

摘要

Commercial-off-the-shelf area array package technologies in high-reliability versions are being considered for use in a number of NASA electronic systems. Although a number of these advanced electronic packages commonly use underfill within the package, including under the flip-chip die; full or partial corner underfilling may also be required at the printed circuit board level to improve assembly reliability, particularly under mechanical and fatigue loading. Testverified guidelines for use of underfill with NASA's stringent requirements on materials and reliability are very limited. In preparation for developing a test matrix and implementation, a survey of literature and current practices and reliability issues are carried out. The report discusses key parameters that influence thermal cycle and mechanical reliability of underfill, edge-bond, and corner stake. In particular, reliability information was gathered for FPBGA and ceramic BGA assemblies. Understanding key characteristics of underfill materials, as well as the process and QA indicators for reliability, are important in judicially selecting and narrowing the follow-up applicable test methods in preparation for low-risk insertion into advanced electronic packages