Techniques for Testing a 15-Bit Data Acquisition System

摘要

This thesis discusses techniques for testing a low-power data acquisition system (DAS). The system resolution is 15-bits, sampling frequency is 128Hz, input range is +-5V, and the maximum input frequency is 45Hz. Techniques considered are those which lend themselves to an automated test, a test which is under computer control and which presents a numerical and/or graphical result. Static and dynamic test procedures are considered in testing a digital-to-analog converter (DAC) and an analog-to-digital converter (ADC). The direct method of static testing DACs was found to be satisfactory for testing the 14-bit DAC used in the system. The DAC-to-ADC loop method using the histogram procedure is the best static test for the DAS; this procedure provides a good estimate of the transition voltages in the presence of noise and is easy to implement. Dynamic testing of the DAS involved two techniques; the histogram method was found to be best for estimating the differential linearity, and the Fourier transform method was found to be best for estimating the integral linearity. A third technique, the sine fit method, was used to give an overall indication of the system's performance. (ERA citation 11:006762)