Multichip packaging technology with laser-patterned interconnects.

摘要

A multichip silicon-on-silicon packaging technology has been developed which incorporates laser-patterned thin-film interconnects. This technology is particularly suited for application in high speed, high power, and high I/O systems where its unique characteristics provide many advantages over more traditional methods. The laser-patterned thin-film interconnects allow higher I/O densities and better electrical performance than wire bonds or TAB. The face-up, thin-film eutectic die attach technique used provides much lower thermal resistance between the substrate and the chips than solder bump die attach can achieve. In addition, laser-patterned interconnects demonstrate superior ruggedness and fatigue resistance under thermomechanical cycling and shock. This technology has been used to produce a 10-chip memory module, samples of which have been tested to relevant methods of MIL-STD 883C. 25 refs., 2 figs., 3 tabs.